The present invention relates to an integrated circuit comprising a microprocessor and an analogue to digital converter (ADC) in which the ADC is selectively and alternately operable under the control of the microprocessor and independently thereof for transferring conversion results to an external device independently of the microprocessor, and the invention also relates to a method for operating the integrated circuit in a first mode in which the ADC is operated under the control of the microprocessor and in a second mode in which conversion results are transferred from the ADC to the external device independently of the microprocessor.
Integrated circuits which comprise a microprocessor and an ADC have many advantages. For example, the microprocessor may be used to set up the signals to be converted by the ADC. The microprocessor can also communicate with other devices in the integrated circuit and external systems, which are external to the integrated circuit, and thus can transfer the conversion results from the ADC internally to the other devices in the integrated circuit, and/or externally of the integrated circuit to the external systems. A further advantage is that the conversion results from the ADC can subsequently be processed by the microprocessor. However, the provision of a microprocessor and an ADC in an integrated circuit can be disadvantageous, particularly where the processing rate of the microprocessor is less than the conversion rate of the ADC. If the conversion rate of the ADC is high with respect to the processing rate of the microprocessor, the microprocessor may have insufficient processing power to read the conversion results from the ADC and then to perform an operation on the conversion results, for example, to write the conversion results to on-chip or external memory. A further disadvantage of such a combination of a microprocessor and an ADC is that each time a conversion cycle has been completed by the ADC the microprocessor is required to transfer the conversion results from the ADC. This necessitates the microprocessor interrupting a current task in order to transfer the data from the ADC. This leads to inefficient operation of the microprocessor and the ADC, and in particular prevents the ADC operating at its full conversion rate. Furthermore, the processing time of the microprocessor available for carrying out other tasks is reduced.
Various solutions have been implemented to overcome these problems, however, none have been entirely satisfactory. One such solution requires the provision of a buffer to store the conversion results from the ADC, and on the assumption that the ADC will not be continuously converting at full speed, the microprocessor can then subsequently process or transfer the conversion results at its own speed. However, the disadvantage of this solution is that processing time of the microprocessor is still required in order to process or transfer the conversion results from the ADC. An alternative solution includes the provision of a direct memory access channel along which the conversion results from the ADC are transferred to memory. However, the disadvantage of this solution is that the microprocessor cannot access memory or other peripherals while the direct memory access is in progress.
There is therefore a need for an integrated circuit which comprises a microprocessor and an ADC in which the ADC is selectively and alternately operable under the control of the microprocessor, and independently thereof for transferring conversion results to an external device independently of the microprocessor, and there is also a need for a method for selectively operating the integrated circuit with the ADC operating under the control of the microprocessor and independently thereof for transferring the conversion results to the external device independently of the microprocessor.
The present invention is directed towards providing such an integrated circuit and a method.
According to the invention there is provided an integrated circuit comprising:
a microprocessor,
an analogue to digital converter (ADC),
an interface for communicating the integrated circuit with an external device,
a switch circuit for selectively and alternately configuring the integrated circuit to operate in a first mode with the microprocessor communicating with the interface through the switch circuit and the ADC operating in a dependent mode under the control of the microprocessor, and a second mode with the ADC operating in an independent mode communicating with the interface through the switch circuit for transferring conversion results from the ADC through the interface to an external device independently of the microprocessor.
Preferably, conversion results are transferred from the ADC to the interface when the integrated circuit is operating in the second mode without interfering with the operation of the microprocessor.
In one embodiment of the invention the switch circuit is responsive to the microprocessor for configuring the integrated circuit to operate in the first and second modes.
In another embodiment of the invention the interface is configurable by the microprocessor for transmitting conversion results from the ADC to the external device in the independent mode of operation of the ADC.
Preferably, the interface is selectively configurable by the microprocessor in one of a master mode and a slave mode for facilitating transmission of the conversion results to the external device from the ADC in the independent mode of operation of the ADC.
Advantageously, the ADC is selectively and alternately configurable by the microprocessor to operate alternately in the independent mode and the dependent mode.
In one embodiment of the invention the switch circuit is responsive to a signal outputted by the ADC in response to the ADC being configured by the microprocessor to operate in the one of the dependent mode and independent mode for configuring the integrated circuit to operate in the corresponding one of the first mode and the second mode.
In another embodiment of the invention the microprocessor is responsive to primary code stored in memory of the integrated circuit for operating the switch circuit for selectively and alternately configuring the integrated circuit to operate in the first mode and the second mode, and in one embodiment of the invention the memory is flash memory.
In a further embodiment of the invention the microprocessor is responsive to an externally generated signal for selectively and alternately configuring the integrated circuit to operate in the first mode and in the second mode.
In one embodiment of the invention each conversion result is transferred from the ADC to the interface in response to a signal from the ADC indicating the conversion result is ready.
In one embodiment of the invention the interface is an N-bit interface, and the ADC is of M-bit resolution, M being greater than N.
Preferably, a temporary storing register is provided for storing some of the M bits of each conversion result, while the other of the M bits of the conversion result are being transferred from the ADC to the interface.
In one embodiment of the invention the switch circuit selectively and alternately communicates the interface with the temporary storing register and the ADC for selectively and alternately transferring the bits stored in the temporary storing register to the interface and the bits to be transferred directly from the ADC to the interface.
Preferably, the switch circuit is responsive to a signal from the interface for selectively communicating the interface with the temporary storing register for transferring the bits of the conversion result from the temporary storing register to the interface.
Advantageously, the interface is a serial interface, and a counter is provided responsive to a clock signal clocking the bits out of the interface to the external device for counting the bits being transmitted from the interface, and the switch circuit is responsive to the counter for communicating the temporary storing register with the interface.
In one embodiment of the invention the data word width of the microprocessor is N-bits.
In another embodiment of the invention the interface is a serial interface.
In a further embodiment of the invention the interface is a serial protocol interface (SPI).
In a further embodiment of the invention a first register is provided communicable with an input switch circuit for selectively switching a plurality of analogue input channels to the ADC, the first register being provided for storing a first control code for controlling the input switch circuit for selecting a sequence in which the analogue input channels are to be switched to the ADC by the input switch circuit. Preferably, the first control code is writeable to the first register by the microprocessor. Advantageously, the first control code is writeable to the first register by the microprocessor under the control of the primary code stored in the memory.
In another embodiment of the invention a second register is provided communicable with the ADC, the second register being provided for storing a second control code for selecting the number of samples to be taken of each analogue input signal switched to the ADC through the input switch circuit from the analogue input channels. Preferably, the second control code is writeable to the second register by the microprocessor. Advantageously, the second control code is writeable to the second register by the microprocessor under the control of the primary code stored in the memory.
Additionally, the invention provides a method for operating an integrated circuit comprising an on-chip microprocessor, an on-chip ADC and an on-chip interface so that the ADC can carry out conversions independently of the microprocessor, the method comprising the steps of
providing an on-chip switch circuit for selectively and alternately communicating the interface with the microprocessor and the ADC, and
operating the switch circuit for selectively and alternately configuring the integrated circuit to operate in a first mode with the microprocessor communicating with the interface through the switch circuit and the ADC operating in a dependent mode under the control of the microprocessor, and a second mode with the ADC operating in an independent mode communicating with the interface through the switch circuit for transferring conversion results from the ADC through the interface to an external device independently of the microprocessor.
In one embodiment of the invention the microprocessor operates the switch circuit for selectively and alternately configuring the integrated circuit to operate in the first mode and the second mode.
In another embodiment of the invention the microprocessor selectively configures the interface for transmitting conversion results from the ADC to the external device in the independent mode of operation of the ADC.
In a further embodiment of the invention the microprocessor selectively and alternately configures the interface in a master mode and a slave mode for facilitating transmission of the conversion results to the external device from the ADC in the independent mode of operation of the ADC.
Preferably, the microprocessor selectively and alternately configures the ADC to operate in the independent mode and the dependent mode.
In one embodiment of the invention a primary code is stored in a memory in the integrated circuit chip, and the microprocessor is operable under the control of the primary code for configuring the integrated circuit between the first and second modes.
Preferably, the primary code is stored in a flash memory.
The advantages of the invention are many. By virtue of the fact that the integrated circuit is selectively operable in a first mode and in a second mode, and when operating in the second mode the ADC is operable independently of the microprocessor for transferring conversion results to the external device, the ADC when the integrated circuit is operating in the second mode can operate continuously at its full data conversion rate, subject to the external device to which the conversion results are being transferred. Additionally, when the integrated circuit is operating in the second mode the microprocessor is also operating independently of the ADC and without interference from the ADC, and thus the microprocessor has more time available to carry out other tasks, and furthermore, to carry out such tasks without interruptions from the ADC. When the integrated circuit is operating in the second mode the conversion results are written directly from the ADC to the interface and transmitted directly from the interface to the external device. The external device may be memory where the conversion results can be stored for subsequent processing by another external device or indeed by the microprocessor of the integrated circuit at a more convenient time, in which case, the stored conversion results would be read from the external memory by the microprocessor, and could be read through the interface when the integrated circuit is operating in the first mode, or any other I/O interface of the integrated circuit, and where the conversion results are read through another I/O interface of the integrated circuit, the conversion results could be read through such another I/O interface with the integrated circuit operating in the first or second modes. Alternatively, the conversion results could be transmitted from the interface to a processor of an external device which would process the conversion results independently of the microprocessor of the integrated circuit. Another advantage of the invention is that by having the integrated circuit selectively operable in the two modes, when it is desired to have the data conversions carried out under the control of the microprocessor, and for example, to have the conversion results processed by the microprocessor of the integrated circuit, the integrated circuit can be readily switched from the second mode of operation to the first mode.
A further advantage of the integrated circuit according to the invention is that when the integrated circuit is operating in the second mode if the microprocessor is not required, the operation of the microprocessor may be stopped by putting the microprocessor into a power saving or a low noise operating mode. Putting the microprocessor into a low noise mode during operation of the ADC has the added advantage that there is little or no danger of the microprocessor interfering with the performance of the ADC.
A further advantage of the integrated circuit according to the invention is that when the integrated circuit is operating in the second mode, the integrated circuit may be operated in a pseudo-direct memory access mode whereby conversion results are transferred to an external RAM through the interface. An additional advantage of the integrated circuit according to the invention is that when operating in the second mode the ADC may be set up for coherent sampling, whereby the ADC would operate in a timed mode or on an external start conversion mode for generating a defined number of samples at a precisely defined time period between each sample. When the ADC is so set up, Fast Fourier Transforms could be carried out on the conversion results.
Another advantage of the invention is that production test of the integrated circuit is simplified, since the testing of the ADC is not limited by the performance of the microprocessor, nor is it complicated by the need to use the microprocessor for processing the conversion results of the ADC. By merely operating the integrated circuit in the second mode, the ADC can be tested independently of the microprocessor.
The invention will be more clearly understood from the following description of some preferred embodiments thereof which are given by way of example only with reference to the accompanying drawings.